Dr. Aditya S

Total Experience
VLSI Design, RF and Mixed signal IC design, PLLs, CMOS controlled oscillators
course handled
Digital Electronic Principles, Digital Logic Design, Analog and Digital Electronics, Analog Electronics, Basics of Electrical and Electronics Engineering, VLSI Design and Technology
Area of interest
Education Details

Publication details
Journal Publications:
Total Number of Journal Publications:
● S. Aditya and S. Moorthi (2021) A flexible digitally controlled oscillator structure to reconfigure the frequency band in multi-band RF AD-PLL system. The Institution of Electronics and Telecommunication Engineers (IETE) Journal of Research (Taylor and Francis). DOI: https: //doi.org/10.1080/03772063.2021.1977190
● Aditya S. and Moorthi Sridharan (2019) A wide tunable fast settling 4-bit digitally controlled oscillator for reconfigurable multi-band RF applications. Microelectronics Journal (Elsevier), 92. DOI: https://doi.org/10.1016/j.mejo.2019.104608.
● S. Aditya and S. Moorthi (2019) Digitally tunable active inductor for RF-DCO applications. International Journal of Electronics Letters (Taylor and Francis), https://doi.org/10.1080/21681724.2019.1625966
● S. Aditya and S. Moorthi, (2014) “Wide Tuning Low Noise OTA based Current Controlled Ring Oscillator to suit PLL Applications”, National Journal of Technology, 10, 66-72.
International & National Conference Publications:
Total Number of Conference Publications:
● S. Aditya and S. Moorthi, (2013) “A Low Jitter Wide Tuning range Phase Locked Loop with Low Power Consumption in 180nm CMOS Technology”, IEEE Asia-Pacific Conference on Postgraduate Research in Microelectronics and Electronics (PRIMEASIA).
● S. Aditya and S. Moorthi, (2013) “Wide Tuning Low Noise OTA based Current Controlled Ring Oscillator to suit PLL Applications”, International Conference on Intelligent and Efficient Electrical Systems (ICIEES) conducted by PSG College of Tech, Coimbatore.
● S. Aditya and M. Anitha, (2006) “Design of VLSI chip for voice compression”, TECHNO QUEST 2006 conducted by KSRM college of Engineering, KADAPA.
Awards and Achievements
- Topper (Gold Medal) in System design through Verilog NPTEL Course 2024
- Topper (Silver Medal) in Digital System Design NPTEL Course 2024
- DeitY Scholarship (2015)
- Best Paper award in ICIEES (2013)
- Gate Qualified (2011)
- First bucket in the performance appraisal at Cognizant
Technology Solutions Pvt. Ltd. (2008) - 2nd Prize in Paper Presentation (2006)
Workshops / Seminars
FDP/ STTP Organized Details
Number of FDP/ STTPs Organized: (03)
1. 24/07/2023 to 30/07/2023 Recent Advancements in VLSI Modeling and IC Design Online Institute
2. 04/01/2023 to 10/01/2023 Emerging trends in 6G Wireless communication Online Institute
3. 01/08/2022 to 7/08/2022 Career Development and Refresher Course Offline Institute
FDP/ STTP Attended Details
Number of FDP/ STTPs Attended: (09)
1. 25/07/2022 to 05/08/2022 5G & B5G Wireless Technologies with MATLAB Practice n/a Online
2. 25/07/2022 t0 30/07/2022 ADVANCES IN ANALYTICAL TECHNIQUES n/a Online
3. 11/07/2022 to 17/07/2022 Biomedical Electronics and Telemedicine n/a Online
4. 13/06/2022 to 17/06/2022 Critical Pedagogy n/a Online
5. 03/07/2023 to 16/07/2023 INNOVATIVE TEACHING STRATEGIES AND TOOLS IN THE DIGITAL AGE n/a Online
6. 06/06/2022 to 12/06/2022 RECENT ADVANCEMENTS IN MACHINE LEARNING, CYBER SECURITY AND IoT n/a Online
7. 06/06/2023 to 23/06/2023 16-day International Online Faculty Development Program on Teaching, Learning and Assessing in 2030 n/a Online
8. 16/10/2023 to 21/10/2023 6-day Online UHV-II FDP n/a Online
9. 30/01/2023 to 03/02/2023 Inculcating Universal Human
Values in Technical Education n/a Online
10. Jul 2024 to Sep 2024 System Design through Verilog NPTEL-AICTE FDP Online
Work Experience
Academic Experience
Total years of Academic Experience:
• Assistant Professor, Department of ECE, SRM Institute of Science and Technology, Tiruchirappalli, May 2022 to till date.
Research Experience
Total years of Research Experience:
• Phd Research Scholar, VLS Design Lab, National Institute of Technology Tiruchirappalli, (Aug 2015 – Feb 2021)
Industry Experience
Total years of Industry Experience:
• Technical Analyst - ERP, Cognizant Technology Solutions Pvt. Ltd., 2 years and 3 months (Aug 2007 – Nov 2009)
Other Experience
• NAAC coordinator
Memberships
Member of the International Association of Engineers (IAENG)
Funded Projects
NIL
Ph.D. Supervision Details
NIL